Computer chips are often built on silicon wafers using a photolithography process that creates layers of circuit patterns on the chip. First, the wafer is coated with a light-sensitive material called photoresist. Light is directed through a patterned plate called a reticle or mask to expose the resist. Following the lithographic process, the wafer is etched so that materials are removed, thus forming a three-dimensional pattern on the surface of the chip. Through additional lithographic and etching steps, subsequent layers of various patterned materials are built up on the wafer to form the multiple layers of circuit patterns on the chip.
Certain single patterns are larger than the field size of the photolithographic stepper. When this occurs, the pattern may be subdivided, where each pattern is fabricated using a photolithography process. After the fabrication process, the patterns are “stitched” to form the original pattern. One example is the fabrication of read-out integrated circuits (ROIC) for an imaging device such as, for example, focal plane arrays (FPA). FPAs are image sensing devices that include light-sensing pixels at the focal plane of a lens.
Currently, in order to determine the number of stitched computer chips, or dice, on the silicon wafers, pads are used. The pads may be bonded externally to each die and may be in communication with one or more controllers via, for example, a bus of wires. Based on the received communication from the pads, the controller may determine how many stitched dice are in use. However, the additional bus of wires associated with each die requires more “real estate” on the wafer and add to the complexity of the circuitry.